Senior CPU Architect: High-Perf RTL

NVIDIA

California (MO)

On-site

USD 168,000 - 311,000

Full time

44 hours ago
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Job summary

NVIDIA is seeking a Senior CPU Design Engineer to help design world-class CPUs for products spanning graphics, AI, and autonomous machines. You will own micro-architecture, RTL, and integration across verification and physical design teams.

Responsibilities include defining CPU sub-systems, achieving performance and power targets, and delivering clean synthesis/timing results while coordinating with chip floor planning and back-end teams.

Qualifications

  • BS or MS in electrical engineering or computer engineering (or equivalent experience).
  • 8+ years of proven experience in micro-architecture and RTL development of complex, high speed designs, ideally in CPU subsystems.
  • Exposure to Computer Architecture and Digital Systems design.
  • Highly proficient in logic design, Verilog and/or SystemVerilog, with a deep understanding of physical design and VLSI.
  • Strengths in scripting languages such as Perl, Python.
  • Good communication and interpersonal skills.

Responsibilities

  • Drive the micro-architecture definition, feasibility studies and documentation of CPU sub-systems.
  • Implement in RTL and coordinate execution with the verification team to ensure that the design is functional.
  • Exercise logic design skills to optimize and meet performance, timing and power targets.
  • Deliver a synthesis/timing clean design while working with the physical design team ensuring a routable and physically implementable design.
  • Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
  • Develop flows and tools as necessary in support of design activities.

Skills

RTL design
Verilog/SystemVerilog
Digital design
Python
Perl
Communication

Education

BS/MS in EE/CE

Job description

NVIDIA is seeking a Senior CPU Design Engineer to help design world-class CPUs for products spanning graphics, AI, and autonomous machines. You will own micro-architecture, RTL, and integration across verification and physical design teams.

Responsibilities include defining CPU sub-systems, achieving performance and power targets, and delivering clean synthesis/timing results while coordinating with chip floor planning and back-end teams.

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