Senior CPU Physical Design Engineer: PPA & Floorplan Expert

Apple Inc.; Beaverton (OR); On-site; USD 150,000 - 200,000; Full time

Job summary

A leading technology company in Beaverton, Oregon, is seeking a CPU Physical Design Engineer to manage block-level physical design and drive RTL-to-GDS convergence. The ideal candidate will have a BS degree and over 10 years of industry experience. Responsibilities include collaboration with various teams to optimize CPU design and improve silicon yield. A commitment to innovation and teamwork is essential.

Qualifications

• Minimum 10 years of relevant industry experience.
• Experience in low power, high frequency physical design techniques.
• Knowledge in deep sub-micron technology.

Responsibilities

• Drive RTL-to-GDS design convergence through logic synthesis.
• Manage block-level physical design delivery and backend flows.
• Collaborate with internal CAD and PD teams on optimization.

Skills

Logic design

Digital circuits

Perl

TCL

Education

BS in relevant field

Tools

Synthesis and PnR tools

STA tools

Power analysis tools

Job description

A leading technology company in Beaverton, Oregon, is seeking a CPU Physical Design Engineer to manage block-level physical design and drive RTL-to-GDS convergence. The ideal candidate will have a BS degree and over 10 years of industry experience. Responsibilities include collaboration with various teams to optimize CPU design and improve silicon yield. A commitment to innovation and teamwork is essential.