Senior CPU Clock Design Engineer – Physical Design

Qualcomm; Austin (TX); Hybrid; USD 148,300 - 222,500; Full time

Benefits offered by this job

Comprehensive benefits package

Discretionary bonus program

Potential RSU grants

Job summary

A leading technology company is seeking a Physical Design Clock Engineer based in Austin, Texas. You will collaborate with design teams to create clocking solutions for next-generation CPUs. The ideal candidate will have a strong background in clock generation and distribution, with a Master's degree in Electrical Engineering and at least 8 years of relevant experience. This role offers a competitive salary range of $148,300 - $222,500, depending on location, along with a comprehensive benefits package.

Qualifications

• Experience in low skew and low power clock generation and distribution.
• Proficiency in clock H-tree, mesh, spines, and CTS implementations.
• 8+ years of practical experience in chip physical design.

Responsibilities

• Work with design teams to validate CPU clocking.
• Drive clock generation methodology of CPU.
• Perform jitter analysis and provide feedback to designers.

Skills

Clock generation and distribution analysis

SPICE simulation

Device physics understanding

Chip physical design

Clock methodology definition

Strong communication skills

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Job description

A leading technology company is seeking a Physical Design Clock Engineer based in Austin, Texas. You will collaborate with design teams to create clocking solutions for next-generation CPUs. The ideal candidate will have a strong background in clock generation and distribution, with a Master's degree in Electrical Engineering and at least 8 years of relevant experience. This role offers a competitive salary range of $148,300 - $222,500, depending on location, along with a comprehensive benefits package.