Hybrid Clock Architect for High-Performance CPUs

Intel Corporation; Austin, Northern (TX, KY); Hybrid; USD 106,000 - 269,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Paid vacation

Job summary

Intel Corporation in Texas is seeking a CPU Clock Design Engineer to design, implement, and optimize clock distribution networks for high‑performance CPU/SoC products. You will run timing analysis, contribute to CTS, and develop custom clock circuits while collaborating across architecture, design, and EDA teams.

The role emphasizes automation scripting, performance/power tradeoffs, and continuous improvement of clocking methodologies in a hybrid work model.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering, Computer Science or related STEM field with 3+ years of experience
• Master's degree in same field with 1+ years of experience

Responsibilities

• Design, implement, and optimize clock distribution networks for CPUs/SoCs
• Contribute to clock architecture development and CTS
• Perform timing analysis and support timing closure across designs
• Develop custom circuits, library cells, and clock-related design solutions
• Analyze performance, power, area, and timing tradeoffs
• Create automation solutions using scripting to boost productivity
• Collaborate with architecture, design, physical implementation, validation, and EDA teams
• Support debug, validation, and optimization throughout development lifecycle
• Drive issues to closure with high engineering quality
• Influence future methodologies and clocking technologies

Skills

Digital design

VLSI design

Physical design

CTS

STA

Logic design

Custom circuit

Semiconductor design

Python scripting

Perl scripting

TCL scripting

Shell scripting

Education

Bachelor's degree in Electrical/Computer Engineering, Computer Science

Master's degree in Electrical/Computer Engineering, or related field

Tools

Python

Perl

TCL

Shell

Job description

Intel Corporation in Texas is seeking a CPU Clock Design Engineer to design, implement, and optimize clock distribution networks for high‑performance CPU/SoC products. You will run timing analysis, contribute to CTS, and develop custom clock circuits while collaborating across architecture, design, and EDA teams.

The role emphasizes automation scripting, performance/power tradeoffs, and continuous improvement of clocking methodologies in a hybrid work model.