Senior CPU Architect — Hybrid, High-Impact with Equity

NVIDIA Corporation; Hillsboro (OR); Hybrid; USD 180,000 - 280,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

NVIDIA Corporation in Hillsboro, Oregon seeks a Senior CPU Design Engineer to define micro-architecture, RTL implementation, and performance-optimized CPU subsystems.

You will collaborate with verification, physical design, and architecture teams to deliver high-speed, power-efficient CPUs for graphics, AI, and autonomous systems, leveraging Verilog/SystemVerilog and scripting in Perl/Python. The role requires 8+ years of relevant experience and strong communication skills.

Qualifications

• BS or MS in electrical engineering or computer engineering (or equivalent experience).
• 8+ years of proven experience in micro-architecture and RTL development of complex, high speed designs, ideally in CPU subsystems.
• Exposure to Computer Architecture and Digital Systems design.
• Strong knowledge of logic design with Verilog and/or SystemVerilog and deep understanding of physical design and VLSI.
• Proficient in scripting languages such as Perl and Python.
• Excellent communication and interpersonal skills.

Responsibilities

• Drive the micro-architecture definition, feasibility studies and documentation of CPU sub-systems.
• Implement in RTL and coordinate with verification to ensure the design is functional.
• Optimize logic design to meet performance, timing and power targets.
• Deliver a synthesis/timing clean design with the physical design team for routable implementation.
• Support hardware activities including floor plan, power/clock distribution, timing closure and back-end verification.
• Develop flows and tools to support design activities.

Skills

Micro-architecture

RTL development

Verilog/SystemVerilog

Scripting: Perl/Python

Education

BS or MS in EE/CE

Tools

Verilog

SystemVerilog

Job description

NVIDIA Corporation in Hillsboro, Oregon seeks a Senior CPU Design Engineer to define micro-architecture, RTL implementation, and performance-optimized CPU subsystems.

You will collaborate with verification, physical design, and architecture teams to deliver high-speed, power-efficient CPUs for graphics, AI, and autonomous systems, leveraging Verilog/SystemVerilog and scripting in Perl/Python. The role requires 8+ years of relevant experience and strong communication skills.