Senior CPU Performance Architect for AI/HPC Systems

NVIDIA Corporation; Santa Clara (CA); On-site; USD 272,000 - 431,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation is seeking a senior architect-level engineer to drive workload bring-up, performance analysis, and optimization across silicon and full-system simulations. You will study AI/DL, CSP, HPC, and autonomous-vehicle workloads to identify critical behaviors and create directed test cases.

Responsibilities include debugging performance bottlenecks on multi-core/multi-socket systems, collaborating with CPU and interconnect teams, and benchmarking against competitors to propose

Qualifications

• BS/MS in Electrical Engineering, Computer Science, Computer Engineering, or equivalent experience.
• 12+ years of relevant experience.
• Experience with CPU workloads and performance analysis.
• Knowledge of performance test development and benchmarking for CPU and I/O.
• Deep knowledge of CPU microarchitecture and system architecture.
• Experience with the ARM instruction set architecture (ISA) preferable but not required.

Responsibilities

• Work on workload bring-up and performance analysis/projection, on silicon and full-system simulator.
• Study workloads for markets including AI/DL, CSP, HPC, and autonomous vehicles.
• Identify critical application behavior and reduce to directed test cases.
• Analyze and debug performance bottlenecks on multi-core and multi-socket CPU and CPU/GPU systems.
• Collaborate with CPU and interconnect architects to improve future CPU and system designs.
• Benchmark NVIDIA’s CPU offerings against competition and suggest software or hardware improvements.

Skills

CPU workloads

Performance analysis

Benchmarking

Multi-core / multi-socket scaling

System architecture

ARM ISA (pref)

Education

BS in Electrical Engineering

BS in Computer Science

MS in Electrical Engineering

MS in Computer Science

Equivalent experience

Job description

NVIDIA Corporation is seeking a senior architect-level engineer to drive workload bring-up, performance analysis, and optimization across silicon and full-system simulations. You will study AI/DL, CSP, HPC, and autonomous-vehicle workloads to identify critical behaviors and create directed test cases.

Responsibilities include debugging performance bottlenecks on multi-core/multi-socket systems, collaborating with CPU and interconnect teams, and benchmarking against competitors to propose