Senior CAD Enablement Lead for Silicon Design & Automation

Olix Computing; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Stock options

Living-Local Bonus

Retirement plan

Job summary

OLIX Computing is seeking a CAD Engineering Lead to support a fast-paced silicon organization spanning digital and analog design. This role maintains the EDA environment, enables efficient workflows, and drives automation across the chip development lifecycle.

You will partner with digital design, verification, physical design, analog, and systems engineering teams to improve methodologies, deploy new tool capabilities, and ensure scalable, high-performance compute environments for demanding EDA

Qualifications

• Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor, Ansys).
• Proficiency in scripting and automation (Python, Tcl, Shell, Perl).
• Strong Linux/Unix and distributed compute knowledge.
• Experience with license management and compute infrastructure.
• Ability to partner with cross-functional engineering teams.

Responsibilities

• Serve as the primary CAD/EDA support contact for digital and analog teams.
• Maintain, troubleshoot, and enhance flows across the silicon lifecycle.
• Develop, deploy, and maintain automation to improve productivity.
• Diagnose EDA tool, licensing, and workflow issues to minimize downtime.
• Collaborate with design, verification, physical design, systems, and software teams.
• Evaluate, qualify, and deploy new EDA releases and best practices.
• Coordinate with IT and external CAD contractors to ensure performance.

Skills

CAD/EDA

IC design flows

Scripting (Python)

Linux/Unix

EDA licenses

Automation tools

Cross-functional

Project management

Vendor collaboration

Compute infrastructure

Tools

Cadence

Synopsys

Siemens EDA (Mentor)

Ansys

Job description

OLIX Computing is seeking a CAD Engineering Lead to support a fast-paced silicon organization spanning digital and analog design. This role maintains the EDA environment, enables efficient workflows, and drives automation across the chip development lifecycle.

You will partner with digital design, verification, physical design, analog, and systems engineering teams to improve methodologies, deploy new tool capabilities, and ensure scalable, high-performance compute environments for demanding EDA