Lead CAD & Design Enablement Engineer Austin, TX

Olix Computing

Austin (TX)

On-site

USD 150,000 - 210,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Stock options
Living-Local Bonus
Retirement plan

Job summary

OLIX Computing is seeking a CAD Engineering Lead to support a fast-paced silicon organization spanning digital and analog design. This role maintains the EDA environment, enables efficient workflows, and drives automation across the chip development lifecycle.

You will partner with digital design, verification, physical design, analog, and systems engineering teams to improve methodologies, deploy new tool capabilities, and ensure scalable, high-performance compute environments for demanding EDA

Qualifications

  • Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor, Ansys).
  • Proficiency in scripting and automation (Python, Tcl, Shell, Perl).
  • Strong Linux/Unix and distributed compute knowledge.
  • Experience with license management and compute infrastructure.
  • Ability to partner with cross-functional engineering teams.

Responsibilities

  • Serve as the primary CAD/EDA support contact for digital and analog teams.
  • Maintain, troubleshoot, and enhance flows across the silicon lifecycle.
  • Develop, deploy, and maintain automation to improve productivity.
  • Diagnose EDA tool, licensing, and workflow issues to minimize downtime.
  • Collaborate with design, verification, physical design, systems, and software teams.
  • Evaluate, qualify, and deploy new EDA releases and best practices.
  • Coordinate with IT and external CAD contractors to ensure performance.

Skills

CAD/EDA
IC design flows
Scripting (Python)
Linux/Unix
EDA licenses
Automation tools
Cross-functional
Project management
Vendor collaboration
Compute infrastructure

Tools

Cadence
Synopsys
Siemens EDA (Mentor)
Ansys

Job description

AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance.

The Role

We are seeking a CAD Engineering Lead to support a fast-paced silicon engineering organization spanning both digital and analog design disciplines. This role is responsible for maintaining and improving the EDA environment, enabling efficient design workflows, developing automation solutions, and serving as a key technical partner to engineering teams throughout the chip development lifecycle.

Responsibilities

Serve as the primary point of contact for day-to-day CAD, EDA, and design environment support for digital and analog engineering teams.

Maintain, enhance, and troubleshoot design, verification, implementation, analog, and signoff flows across the silicon development lifecycle.

Develop, deploy, and maintain automation, scripting, and infrastructure solutions that improve engineering productivity, design quality, and execution efficiency.

Diagnose and resolve EDA tool, licensing, environment, and workflow issues to minimize engineering downtime and accelerate project execution.

Partner closely with digital design, verification, physical design, analog, and systems engineering teams to understand requirements, address challenges, and continuously improve design methodologies.

Evaluate, qualify, and deploy new EDA tool releases, methodologies, and best practices to improve team effectiveness and design quality.

Work directly with EDA vendors to investigate technical issues, drive issue resolution, and influence future tool capabilities and enhancements.

Partner with IT, infrastructure, and operations teams to develop and maintain a reliable, scalable, and high-performance computing environment that supports demanding EDA workloads.

Monitor, analyze, and optimize compute, storage, network, and licensing resources to maximize engineering productivity, improve resource utilization, and reduce infrastructure bottlenecks.

Collaborate with IT teams on infrastructure planning, capacity forecasting, deployment of new technologies, and resolution of system-level issues impacting design and verification workflows.

Create and maintain documentation, training materials, and support processes that enable efficient onboarding and effective use of design tools and methodologies.

Coordinate and manage external CAD contractors and service providers, including task definition, prioritization, technical oversight, deliverable review, and quality assurance.

Lead and coordinate a blended team of internal and external CAD resources to execute CAD roadmap initiatives, methodology improvements, and engineering support activities.

Define and drive continuous improvement initiatives for CAD methodologies, automation frameworks, infrastructure, and engineering workflows to support organizational growth and future silicon programs.

Contribute to long‑term CAD strategy and roadmap planning, balancing immediate engineering support needs with scalable infrastructure and methodology investments.

Skills & Experience

5+ years of experience supporting semiconductor design teams in a CAD, EDA, design methodology, or silicon infrastructure role.

Strong understanding of digital and/or analog IC design flows, including design entry, simulation, verification, implementation, and signoff methodologies.

Hands‑on experience administering and supporting industry‑standard EDA tools from vendors such as Cadence, Synopsys, Siemens EDA (Mentor), or Ansys. Proficiency in scripting and automation using Python, Tcl, Shell, Perl, or similar languages.

Experience developing and maintaining engineering workflows, automation frameworks, and productivity‑enhancing tools. Strong knowledge of Linux/Unix operating systems and distributed compute environments.

Experience with EDA license management, job scheduling systems, and compute infrastructure used for semiconductor development.

Understanding of compute, storage, networking, and infrastructure considerations for large‑scale design and verification workloads.

Experience troubleshooting complex technical issues spanning EDA tools, design flows, infrastructure, and user environments.

Ability to partner effectively with cross‑functional engineering teams, including digital design, verification, physical design, analog, systems, and software engineers.

Experience working with IT and infrastructure organizations to deploy, maintain, and optimize engineering computing environments.

Experience managing external contractors, consultants, or offshore engineering resources, including technical oversight and prioritization of work.

Strong project management and organizational skills, with the ability to balance multiple priorities and support requests in a fast‑paced environment.

Excellent written and verbal communication skills, with the ability to communicate effectively across technical disciplines and organizational levels.

Demonstrated ability to drive continuous improvement initiatives and influence engineering best practices.

Self‑motivated, customer‑focused, and capable of operating independently while collaborating across a broad engineering organization.

Compensation & Equity

Competitive Salary: Commensurate with your experience, skills, and location

Equity & Ownership: Meaningful stock options. You’re not just joining the mission; you’re owning a piece of it

Proximity Bonus: We value your time. To minimise your commute and maximise your life, we offer an annual Living-Local Bonus if your residence is within 20 minutes of the office

Retirement Benefits:Employer-contributed retirement plans to help you build long-term financial security

Due to U.S. export control regulations, candidates’ eligibility to work at OLIX depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

We do not accept unsolicited CVs from recruitment agencies, will not be liable for any fees, and prohibit unauthorised use of our company name in recruitment activities.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Lead CAD & Design Enablement Engineer
Lead CAD & Design Enablement Engineer

Creandum Advisor LLP • Austin (TX)

On-site
USD 90,000 - 130,000
Competitive salary
Equity options
Proximity bonus
+1
Lead CAD & Design Enablement Engineer
Lead CAD & Design Enablement Engineer

OLIX • Austin (TX)

On-site
USD 100,000 - 130,000
Competitive salary
Equity & ownership
Proximity bonus
+1
Senior/Staff Digital Design Engineer Austin, TX and Bristol, UK
Senior/Staff Digital Design Engineer Austin, TX and Bristol, UK

Olix Computing • Austin (TX)

On-site
USD 140,000 - 230,000
Equity
Ownership
Proximity Bonus
+1
Senior/Staff Analog Design Engineer - SerDes
Senior/Staff Analog Design Engineer - SerDes

Olix Computing • Austin (TX)

On-site
USD 150,000 - 260,000
Equity & Ownership
Living-Local Bonus
Retirement Benefits
Senior/Staff Analog Design Engineer - SerDes
Senior/Staff Analog Design Engineer - SerDes

OLIX • Austin (CO)

On-site
USD 317,000 - 365,000
Competitive Salary
Stock options
Living-Local Bonus
+2
Senior/Staff Analog Design Engineer - SerDes
Senior/Staff Analog Design Engineer - SerDes

OLIX • Austin (TX)

On-site
USD 317,000 - 400,000
Competitive salary
Meaningful stock options
Living-Local Bonus
+2
Senior/Staff Design for Test Engineer
Senior/Staff Design for Test Engineer

OLIX • Austin (TX)

On-site
USD 150,000 - 210,000
Equity & ownership
Proximity bonus
Retirement benefits
AMS Engineer
AMS Engineer

Olix Computing • Austin (TX)

On-site
USD 150,000 - 190,000
Equity & Ownership
Proximity Bonus
Retirement Benefits
Senior/Staff Design for Test Engineer
Senior/Staff Design for Test Engineer

Olix Computing • Austin (TX)

On-site
USD 140,000 - 210,000
Equity & Ownership
Proximity Living-Local Bonus
Retirement benefits
Director of Strategic Sourcing
Director of Strategic Sourcing

Olix Computing • Austin (TX)

On-site
USD 180,000 - 260,000
Equity & Ownership
Proximity Bonus
Retirement Benefits