Senior CAD DV Engineer - RTL Regression & Silicon Tools
Apple Inc.
San Francisco (CA)
On-site
USD 147,400 - 272,100
Full time
14 days+
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Benefits offered by this job
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
Educational reimbursement
Stock options
Job summary
A leading technology company in San Francisco seeks a software engineer to develop systems for regression testing of silicon designs. The position requires a minimum of a BS degree and 3 years of relevant experience, with strong Python programming skills. Candidates familiar with Verilog and SystemVerilog, and those with communication skills, will excel. Apple offers competitive compensation between $147,400 and $272,100 as well as comprehensive benefits and stock options.
Qualifications
Minimum of 3 years of relevant experience.
Experience developing regression systems.
Familiarity with artificial intelligence and machine learning.
Responsibilities
Develop and enhance software systems for regression testing.
Work closely with EDA vendors and the DV team.
Diagnose complex problems and guide team members.
Skills
Python programming
Communication skills
Problem-solving
Knowledge of Verilog and SystemVerilog
Education
BS degree
MSEE/CE/CS preferred
Tools
Synopsys VCS
XCelium
Modelsim
Verdi
Indago
Job description
A leading technology company in San Francisco seeks a software engineer to develop systems for regression testing of silicon designs. The position requires a minimum of a BS degree and 3 years of relevant experience, with strong Python programming skills. Candidates familiar with Verilog and SystemVerilog, and those with communication skills, will excel. Apple offers competitive compensation between $147,400 and $272,100 as well as comprehensive benefits and stock options.