Senior Automotive ASIC Digital Design Engineer

Axonne Inc.

San Jose (CA)

Presencial

USD 140 000 - 210 000

Tempo integral

Há 9 dias

Recebe uma resposta deste empregador

O teu currículo e carta de apresentação, adaptados exatamente ao que estão a contratar.

Ultrapassa os filtros ATS

Resumo da oferta

Axonne Inc. in San Jose, California seeks a skilled Digital Design Engineer to drive the architecture, design, and tape-out of ASICs for high-speed automotive networks. You will work across teams to bring advanced digital designs from concept through production.

Responsibilities include RTL design in Verilog/VHDL, optimizing data paths and interfaces, building testbenches, and performing simulations. Collaborate with analog/mixed-signal, verification, software and systems teams to meet ISO 26262

Qualificações

  • Bachelor’s or Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or a related field.
  • 5+ years of hands-on experience in ASIC design, preferably within the semiconductor or automotive sector.
  • Strong grasp of digital logic design.
  • Proficient with industry-standard EDA tools (Cadence, Synopsys, Mentor).
  • Excellent problem-solving and debugging skills; collaborative team player.

Responsabilidades

  • Define ASIC architecture, microarchitecture, and design specifications.
  • Drive and contribute to ASIC development from concept to tape-out.
  • Design and implement digital logic using Verilog and/or VHDL.
  • Optimize data paths, control logic, and interface blocks for performance and efficiency.
  • Develop comprehensive test plans, testbenches, and assertions for functional verification.
  • Perform simulations using industry-standard tools to validate design functionality and performance.
  • Work closely with analog/mixed-signal, verification, software, and systems teams to ensure successful integration.
  • Support silicon bring-up and debug, and assist in production validation activities.

Conhecimentos

Digital logic design
EDA tools
Problem-solving
Team collaboration

Formação académica

Bachelor’s or Master’s degree in Electrical/Electronic Engineering or related field

Ferramentas

Cadence
Synopsys
Mentor

Descrição da oferta de emprego

Axonne Inc. in San Jose, California seeks a skilled Digital Design Engineer to drive the architecture, design, and tape-out of ASICs for high-speed automotive networks. You will work across teams to bring advanced digital designs from concept through production.

Responsibilities include RTL design in Verilog/VHDL, optimizing data paths and interfaces, building testbenches, and performing simulations. Collaborate with analog/mixed-signal, verification, software and systems teams to meet ISO 26262

Obtém a tua avaliação gratuita e confidencial do currículo.

ou arrasta e larga o ficheiro aqui.

Similar jobs

Ofertas semelhantes que vale a pena comparar

Digital Design Engineer
Digital Design Engineer

Axonne Inc. • San Jose (CA)

Presencial
USD 140 000 - 210 000
Senior Automotive Analog/Mixed-Signal Designer
Senior Automotive Analog/Mixed-Signal Designer

Axonne Inc. • San Jose (CA)

Presencial
USD 120 000 - 150 000
Analog Designer
Analog Designer

Axonne Inc. • San Jose (CA)

Presencial
USD 120 000 - 150 000
Senior ASIC Digital Design Lead
Senior ASIC Digital Design Lead

Analog Devices, Inc. • Austin (TX)

Presencial
USD 140 000 - 190 000
Senior ASIC Digital Design Engineer: RTL & Verification
Senior ASIC Digital Design Engineer: RTL & Verification

Synopsys, Inc. • Austin (TX)

Presencial
USD 120 000 - 180 000
Senior ASIC Digital Architect & IP Integration Lead
Senior ASIC Digital Architect & IP Integration Lead

Synopsys, Inc. • Austin (TX)

Presencial
USD 180 000 - 240 000
Health benefits
Professional development
Senior Digital ASIC Architect and Tech Lead
Senior Digital ASIC Architect and Tech Lead

Anysilicon • Durham (NC)

Híbrido
USD 130 000 - 170 000
Senior ASIC Digital Design Engineer: RTL & HP Silicon
Senior ASIC Digital Design Engineer: RTL & HP Silicon

Synopsys Inc • Austin (TX)

Presencial
USD 150 000 - 210 000
Senior ASIC Front-End Design Engineer — Pre-IPO Stock
Senior ASIC Front-End Design Engineer — Pre-IPO Stock

Ethernovia • San Jose (CA)

Híbrido
USD 200 000 - 300 000
Pre IPO stock options
Competitive base salary
Flexible hours
+1
Lead Architect, ASIC Digital Design & Verification
Lead Architect, ASIC Digital Design & Verification

Synopsys Inc • Austin (TX)

Presencial
USD 180 000 - 240 000
Competitive compensation
Health and wellness programs
Retirement benefits
+1