Senior ASIC Verification Engineer - Networking & SoC

Meta; Sunnyvale (CA); Presencial; USD 178 000 - 250 000; Tempo integral

Resumo da oferta

Meta is hiring an ASIC Design Verification, Networking Engineer within the Infrastructure organization. We seek experts in design verification to build IP and SoC for data center applications, participating with software, hardware, and post-silicon teams to ensure first-pass silicon success.

You will define verification plans, develop testbenches, and drive closure using SystemVerilog UVM/OVM, C/C++, and modern verification methods, including formal and emulation, in a collaborative data-center

Qualificações

• 8+ years of IP/sub-system and/or SoC level verification using SystemVerilog UVM/OVM or C/C++ verification.
• Experience in Ethernet, 400G MAC, NIC, RDMA, RoCE or related networking verification.
• Architecting and implementing verification infrastructure and full verification cycles.
• Proficiency in Python, Perl, or TCL to build verification tools and workflows.
• Debugging complex verification challenges in IP or SoC designs.
• Collaborating with cross-functional teams to drive milestones.

Responsabilidades

• Define and implement IP/SoC verification plans and build verification test benches.
• Develop functional tests based on the verification plan.
• Drive verification closure using defined metrics and coverage goals.
• Debug and root-cause functional failures in the design with Design team.
• Collaborate with Design, Model, Emulation, and Silicon validation teams.
• Develop and drive continuous verification improvements with modern methodologies.

Conhecimentos

IP/SoC verification

UVM/OVM methodologies

C/C++ verification

Networking verification

Python scripting

SystemVerilog

Formação académica

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Ferramentas

Python

Perl

TCL

Descrição da oferta de emprego

Meta is hiring an ASIC Design Verification, Networking Engineer within the Infrastructure organization. We seek experts in design verification to build IP and SoC for data center applications, participating with software, hardware, and post-silicon teams to ensure first-pass silicon success.

You will define verification plans, develop testbenches, and drive closure using SystemVerilog UVM/OVM, C/C++, and modern verification methods, including formal and emulation, in a collaborative data-center