Senior ASIC Verification Engineer, AI/ML Data Center

Google Inc.; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google Sunnyvale, CA, USA is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will verify complex TPU architectures and contribute to data center accelerators through rigorous design verification and silicon bring-up.

You will work on cutting-edge TPU technology, mentor junior team members, and collaborate across teams to ensure correct digital designs and robust verification methodologies in a fast-paced AI-driven environment.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
• 8 years of experience with design verification.
• Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.

Responsibilities

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Skills

RTL verification

SystemVerilog/UVM

ASIC verification

Mentoring

Verification life cycle

Education

Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science

Master's degree or PhD in EE/CS with emphasis on computer architecture

10+ years of experience with industry standard tools and methodologies for silicon ICs

Tools

SystemVerilog/UVM tools

Job description

Google Sunnyvale, CA, USA is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You will verify complex TPU architectures and contribute to data center accelerators through rigorous design verification and silicon bring-up.

You will work on cutting-edge TPU technology, mentor junior team members, and collaborate across teams to ensure correct digital designs and robust verification methodologies in a fast-paced AI-driven environment.