Senior ASIC Verification Engineer - AI-Driven SoC Testing

Ipro Networks Pte. Ltd.; Austin (TX); Remote; USD 138,000 - 152,000; Part time

Job summary

IntelliPro is seeking a Sr. Verification Engineer (ASIC) for a contracted, remote role with potential relocation to the USA. You will own verification across IP, subsystem, and SoC components, employing constrained-random, formal, and directed testing, while contributing to an AI-enabled verification platform.

The ideal candidate has a strong background in SystemVerilog/UVM, metric-driven verification, and RTL/debug of complex digital blocks, with optional experience in wireless/modem domains.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field, or 7+ years equivalent experience.
• Minimum five years of professional experience in ASIC or SoC functional verification.
• Hands-on expertise in SystemVerilog, UVM or formal testbench development and maintenance.
• Experience with metric-driven verification for planning, assertions, and functional coverage closure.
• Experience verifying complex digital control and datapath logic, including RTL and system-level debug.
• Background in space-based communications, wireless communications, or modem, baseband, or DSP hardware.
• Experience verifying LDPC, FEC, framing, or beamforming logic using bit-accurate reference models and fixed-point analysis.
• Formal verification experience on production silicon, including connectivity, register maps, arbitration, CDC, or security properties.
• Experience with interconnect or NoC verification covering performance, bandwidth, QoS, and deadlock analysis.
• Experience verifying fault tolerance and reliability features such as ECC, redundancy schemes, or fault injection.
• Experience developing C-based or portable stimulus for SoC, CPU boot, and firmware-driven test scenarios.
• Experience applying AI, ML, or LLM tooling to stimulus generation, regression triage, or coverage analysis.

Responsibilities

• Own verification planning and execution for complex blocks and subsystems, from test plan through sign-off.
• Translate design specifications into verification strategies, measurable coverage goals, and early identification of high-risk scenarios.
• Select verification methods for each problem, including constrained-random simulation, formal analysis, and directed testing.
• Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
• Drive functional coverage closure, regression health, and sign-off readiness across simulation and formal results.
• Build verification infrastructure, regression and CI systems, and reuse strategy across IP, subsystem, and SoC levels.
• Apply and build AI-assisted verification capabilities for stimulus generation, regression triage, and coverage analytics.
• Review testbench architecture and debug methodology, and mentor junior engineers in verification methodology.

Skills

SystemVerilog

UVM

Formal verification

RTL

Education

Bachelor's degree or equivalent

Tools

Scoreboards

Protocol monitors

Assertions

Job description

IntelliPro is seeking a Sr. Verification Engineer (ASIC) for a contracted, remote role with potential relocation to the USA. You will own verification across IP, subsystem, and SoC components, employing constrained-random, formal, and directed testing, while contributing to an AI-enabled verification platform.

The ideal candidate has a strong background in SystemVerilog/UVM, metric-driven verification, and RTL/debug of complex digital blocks, with optional experience in wireless/modem domains.