Senior ASIC Reliability & Hardware Validation Architect

Cisco Systems, Inc.; San Jose, Northern (CA, KY); Hybrid; USD 231,000 - 344,000; Full time

Job summary

Cisco Systems, Inc. in San Jose, CA is seeking a senior Hardware Reliability Engineer to lead high-speed design validation and reliability testing for next‑gen semiconductor and networking products.

You will bridge semiconductor testing with board design, ensuring quality, performance, and reliability in hyperscale environments. You will lead qualification activities, collaborate across engineering functions, and drive design-for-reliability from design FMEA to production qualification.

Qualifications

• Master’s degree in electrical engineering or related field.
• 10+ years of professional experience in semiconductor reliability and/or high-speed hardware design.
• Deep knowledge of JEDEC, AEC, and Telcordia standards.

Responsibilities

• Define and execute qualification plans for next-generation high-power solutions (wafer/package level).
• Drive HTOL, Burn-In, and stress testing; manage reliability suppliers and subcontractors.
• Lead hardware design, schematic generation, and validation for service provider routing products; manage board bring-up and debugging.
• Drive failure analysis and generate detailed qualification reports to ensure product integrity.
• Partner with eCAD, FPGA, Power, Mechanical, Signal Integrity, and Manufacturing teams for design-for-reliability and high-speed interface compliance.
• Provide technical documentation and support for customer quality and reliability requirements.

Skills

High-speed design

Semiconductor reliability

HTOL/Burn-In testing

JEDEC/AEC standards

Cadence Allegro

Python/Verilog scripting

Data analysis

Schematic interpretation

Education

Master’s degree in Electrical Engineering

Tools

Cadence Allegro

Job description

Cisco Systems, Inc. in San Jose, CA is seeking a senior Hardware Reliability Engineer to lead high-speed design validation and reliability testing for next‑gen semiconductor and networking products.

You will bridge semiconductor testing with board design, ensuring quality, performance, and reliability in hyperscale environments. You will lead qualification activities, collaborate across engineering functions, and drive design-for-reliability from design FMEA to production qualification.