Senior ASIC Program Manager — Silicon Delivery (Hybrid)

Accenture PLC; California; Hybrid; USD 96,000 - 110,000; Full time

Benefits offered by this job

Medical coverage

Dental coverage

Vision coverage

401(k) plan

Paid time off

Long-term disability

Job summary

Accenture is seeking a seasoned Technical Program Manager to drive end-to-end ASIC program execution within its Accenture Flex ecosystem in the California area. The role requires coordinating architecture, RTL, verification, physical design, bring-up and post-silicon activities while aligning with product roadmaps and risk management.

The ideal candidate has strong cross-functional communication, at least 4 years in hardware/silicon programs, and a solid grasp of ASIC development processes.

Qualifications

• 4+ years of Technical Program Management experience leading hardware or silicon programs.
• Ability to work with technical teams to develop systems solutions and products.
• Strong communication, organization, and cross-functional coordination.
• Deep understanding of end-to-end ASIC silicon development process.

Responsibilities

• Develop and manage overall program lifecycle with scope, milestones, and tracking.
• Influence roadmaps via product interception, market fit, benchmarking, feasibility.
• Provide hands-on PM across ASIC lifecycle: architecture, RTL, verification, physical design, bring up, post-silicon.
• Partner with Engineering and Product to define roadmaps with measurable outcomes.
• Own risk, mitigation, change management; surface issues to keep on track.
• Deliver coordination and QA across concurrent workstreams with structured reporting.

Skills

Technical Program Management

Hardware projects

Communication skills

ASIC development

Education

BS in CS/CE or related

MS/PhD in EE/CE or related

Tools

Jira

Asana

Job description

Accenture is seeking a seasoned Technical Program Manager to drive end-to-end ASIC program execution within its Accenture Flex ecosystem in the California area. The role requires coordinating architecture, RTL, verification, physical design, bring-up and post-silicon activities while aligning with product roadmaps and risk management.

The ideal candidate has strong cross-functional communication, at least 4 years in hardware/silicon programs, and a solid grasp of ASIC development processes.