Senior ASIC Performance Architect & Modeling (Hyperscale)

Meta; United States; On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Silicon Engineering organization is seeking an ASIC Engineer specializing in performance architecture and modeling to define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs for Meta's infrastructure.

You will develop cycle-accurate and transaction-level simulation environments, validate pre-silicon models, and collaborate with architecture, RTL, and software teams to meet throughput, latency, and efficiency targets

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or equivalent practical experience.
• 8+ years of experience in ASIC design, silicon engineering, or related field.
• 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation.
• Proficiency in C++ and Python for simulation models and performance tools.
• Experience with cycle-accurate or transaction-level models using C++/SystemC.

Responsibilities

• Define and own performance modeling strategy for custom infrastructure ASICs, incl. cycle-accurate and transaction-level sims.
• Drive microarchitectural exploration across compute, memory, interconnect, and I/O.
• Develop and validate pre-silicon models predicting post-silicon behavior for data center workloads.
• Develop workloads and kernels for ML training and inference.
• Establish benchmarking frameworks and bottleneck analysis for the ASIC pipeline.
• Collaborate with architecture, RTL, and physical design to translate requirements into specs.
• Partner with software teams to optimize workloads against silicon performance.
• Lead cross-functional reviews and communicate results to leadership.
• Define long-term performance modeling infrastructure roadmaps.

Skills

C++

Python

SystemC

assembly programming

GPU/ML programming

multi-threaded programming

Education

Bachelor's degree in Computer Science or Computer Engineering

Tools

SystemC

SystemVerilog

VHDL

Python

C++

Job description

Meta's Silicon Engineering organization is seeking an ASIC Engineer specializing in performance architecture and modeling to define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs for Meta's infrastructure.

You will develop cycle-accurate and transaction-level simulation environments, validate pre-silicon models, and collaborate with architecture, RTL, and software teams to meet throughput, latency, and efficiency targets