Senior ASIC Modem Architect for Satellite Communications

Amazon Inc.; San Diego, Sunnyvale, Austin, Redmond (CA, CA, TX, WA); On-site; USD 185,000 - 250,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Job summary

Amazon is seeking an experienced Lead ASIC Modem Design Engineer for the Leo program in San Diego, CA. You will shape the digital chip SOCs for wireless communications with DoEs, implement from system spec to RTL, and drive high-quality first-time silicon solutions.

The role involves collaborating with system, verification, and software teams, developing test benches, and optimizing performance, power, and timing for space-grade modem IP. A strong background in DSP and CMOS design is required.

Qualifications

• Bachelor's degree in Electrical/Communications Engineering or related field.
• 7+ years of digital logic design experience, preferably in DSP or communications.

Responsibilities

• Define and implement wireless modem system architecture from spec to RTL implementation.
• Develop high-performance silicon designs optimizing timing, power, and area.
• Create standalone verification test benches and perform hardware validation.
• Collaborate with verification, PHY, MAC, and software teams for HW-SW integration.
• Mentor junior engineers and review work assignments.

Skills

Analytical skills

Debugging

Problem solving

Mentorship

Education

Bachelor's degree in Electrical/Communications Engineering

Master's or Ph.D in Electrical/Communications Engineering

Tools

UVM

Matlab

Cadence

Synopsys

Mentor Graphics

Job description

Amazon is seeking an experienced Lead ASIC Modem Design Engineer for the Leo program in San Diego, CA. You will shape the digital chip SOCs for wireless communications with DoEs, implement from system spec to RTL, and drive high-quality first-time silicon solutions.

The role involves collaborating with system, verification, and software teams, developing test benches, and optimizing performance, power, and timing for space-grade modem IP. A strong background in DSP and CMOS design is required.