LEO Satellite Modem FPGA/ASIC Engineer Lead

Logos Space; Mountain View (CA); On-site; USD 190,000 - 280,000; Full time

Job summary

Logos Space in Mountain View, CA seeks a Senior FPGA Modem Engineer to design, verify and release FPGA-based modem solutions for our high-throughput LEO satellite system. You will work with the modem systems team on waveform designs using fixed-point FPGA hardware and DSP blocks.

This role offers the chance to help build a space-grade communications system from the ground up, collaborating with HW, FW, RF and networking teams while mentoring junior engineers and applying best practices in FPGA

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field.
• 10+ years in design, development and implementation of wireless baseband modems using FPGA devices or ASIC equivalent.
• Proficiency in HDL (Verilog/SystemVerilog/VHDL).
• Experience with verification frameworks using SystemVerilog/UVM, Cocotb or similar.
• Deep FPGA architecture knowledge and timing closure techniques with modern FPGA families.
• DFE architecture and high-speed interfaces (DDR4/5, 10/40/100 GbE, JESD-204B/C).
• Experience with Vivado and FPGA toolchains; lab debugging with instruments.
• Embedded software debugging and Linux/Git familiarity.
• Strong communication and teamwork skills.

Responsibilities

• Own FPGA-based modem chains through all development phases.
• Define micro-architecture of high-rate FPGA modem blocks and implement in SystemVerilog/Verilog.
• Develop self-checking hardware verification environments with golden models.
• Create synthesis/build scripts with timing, power and resource constraints.
• Define hardware/software interfaces and test hooks for FPGA systems.
• Perform code/design reviews and participate in cross-functional reviews.
• Collaborate with HW, FW/SW, and systems teams for lab bring-up of FPGA-based boards.
• Mentor junior engineers and promote FPGA best practices.

Skills

FPGA design

Verilog/SystemVerilog

SystemVerilog/UVM

Vivado

Embedded SW debugging

Linux & Git

Technical leadership

Communication skills

Education

Bachelor's degree in EE/CE/CS

Tools

AMD Vivado

Cocotb

Git

Job description

Logos Space in Mountain View, CA seeks a Senior FPGA Modem Engineer to design, verify and release FPGA-based modem solutions for our high-throughput LEO satellite system. You will work with the modem systems team on waveform designs using fixed-point FPGA hardware and DSP blocks.

This role offers the chance to help build a space-grade communications system from the ground up, collaborating with HW, FW, RF and networking teams while mentoring junior engineers and applying best practices in FPGA