Senior ASIC Floorplan Architect — Impact SoC/GPUs & Equity

NVIDIA; Santa Clara (CA); On-site; USD 196,000 - 310,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is looking for a Senior ASIC Floorplan Design Engineer in Santa Clara, California. This role involves designing and optimizing floorplans for cutting-edge GPUs and SoCs, requiring extensive hardware engineering expertise. You will collaborate with different teams to solve design issues and optimize chip execution efficiency.

Ideal candidates will have a Master's degree in Electrical Engineering or related fields with over 12 years of experience in hardware engineering, particularly in VLSI. The compensation package includes competitive salary and equity options.

Qualifications

• 12+ years of relevant work experience.
• Deep hardware engineering background with concentration in VLSI and/or Computer Architecture.
• Experience with CAD and physical design methodologies, chip floorplan, power/clock distribution, packaging, P&R, and timing closure.

Responsibilities

• Develop and optimize floorplans during early chip development.
• Drive area review process and collaborate with ASIC design team.
• Solve timing and routing congestion issues with design teams.
• Build tools and improve existing infrastructure for chip optimization.

Skills

VLSI

Computer Architecture

Verilog

System Verilog

Python

Perl

C/C++ programming

Interpersonal skills

Education

Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering

Tools

CAD tools

Job description

NVIDIA is looking for a Senior ASIC Floorplan Design Engineer in Santa Clara, California. This role involves designing and optimizing floorplans for cutting-edge GPUs and SoCs, requiring extensive hardware engineering expertise. You will collaborate with different teams to solve design issues and optimize chip execution efficiency.

Ideal candidates will have a Master's degree in Electrical Engineering or related fields with over 12 years of experience in hardware engineering, particularly in VLSI. The compensation package includes competitive salary and equity options.