Senior ASIC Floorplan Architect - Drive Next-Gen SoCs

NVIDIA Corporation; Santa Clara (CA); On-site; USD 196,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation is seeking a Senior ASIC Floorplan Design Engineer to shape floorplans for leading GPUs and SoCs. You will work with architects, leads, and design teams to optimize area, timing, and power in early chip stages.

The role requires a Master’s in a related field and 12+ years of hardware experience, with proficiency in Verilog/SystemVerilog, CAD tools, and C/C++. Equity and comprehensive benefits accompany a competitive base salary.

Qualifications

• Master's Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
• 12+ years of relevant work experience.
• Deep hardware engineering background with concentration in VLSI and/or Computer Architecture.

Responsibilities

• Develop and optimize floorplans during early chip development with architects and leads.
• Drive area review process and collaborate to identify improvement opportunities.
• Solve timing and routing congestion issues by influencing design decisions.
• Build tools and improve infrastructure to optimize chip area and speed.

Skills

Verilog / SystemVerilog

CAD Tools

VLSI / Computer Architecture

Programming: Python / Perl / C/C++

Communication

Team Collaboration

Education

Master's Degree in EE/CS/CE

Tools

CAD / Physical Design Tools

EDA Tool Flow

Job description

NVIDIA Corporation is seeking a Senior ASIC Floorplan Design Engineer to shape floorplans for leading GPUs and SoCs. You will work with architects, leads, and design teams to optimize area, timing, and power in early chip stages.

The role requires a Master’s in a related field and 12+ years of hardware experience, with proficiency in Verilog/SystemVerilog, CAD tools, and C/C++. Equity and comprehensive benefits accompany a competitive base salary.