Senior ASIC Architect & Technical Lead

Cisco; San Jose (CA); On-site; USD 172,000 - 245,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

401(k) matching

Paid parental leave

Disability coverage

Life insurance

Restricted stock units

Job summary

Cisco is seeking an ASIC Engineering Technical Leader (onsite) in San Jose, CA. You will define, design and verify ASICs and subsystems for Cisco platforms, leading a multi-disciplinary team to meet the power, performance and area goals.

You will drive verification strategies, architecture decisions, and production-ready designs. You will own infrastructure and testing environments, coordinate with PD/DV flows, and mentor engineers while shaping reusable building blocks across channels.

Responsibilities

• Define architecture and design of high performance ASICs
• Owns applications or multiple complex functional areas
• Oversees reusable code and its applications
• Creates re-usable code that promotes efficiencies in new ways
• Debugs at system level
• Consults for architecture and design decisions outside of depth areas
• Provides robust design solutions across product
• Re-enforces guidelines/standards across teams
• Defines verification strategies
• Coordinates with appropriate stakeholders to integrate into PD and DV flows
• Owns infrastructure and testing environment
• Leads and designs the building blocks of multiple channels
• Applies and drives the design methodology from conception to production
• Influences and collaborates with teams to ensure specifications and requirements are met
• Leads technical expertise of a physical design function
• Interfaces with vendors and design leads on full chip timing closure, PI, and PV
• Owns the full electrical planning and specifications of electrical interfaces
• Develops multiple solutions, first test vehicles and performs verification and validation

Job description

Cisco is seeking an ASIC Engineering Technical Leader (onsite) in San Jose, CA. You will define, design and verify ASICs and subsystems for Cisco platforms, leading a multi-disciplinary team to meet the power, performance and area goals.

You will drive verification strategies, architecture decisions, and production-ready designs. You will own infrastructure and testing environments, coordinate with PD/DV flows, and mentor engineers while shaping reusable building blocks across channels.