Senior ASIC Design Engineer — High-Performance IP

QUALCOMM, Inc.; Santa Clara (CA); On-site; USD 135,000 - 202,000; Full time

Job summary

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking an ASIC Engineer to define, model, design, optimize, verify, validate, implement, and document IP for high performance, low power products.

The role collaborates with software and hardware teams to meet system requirements and customer needs; requires hands-on experience with RTL to GDS flows and tools like Virtuoso. Minimum qualifications include a Bachelor's degree and 2+ years of ASIC design/verification experience; Master’s or PhD

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 2+ years of ASIC design/verification experience.
• Master's degree or PhD in Science, Engineering, or related field with related experience.
• 2+ years of experience with architecture/design tools and scripting languages.
• 2+ years of experience with design verification methods and methodologies.

Responsibilities

• Defines, models, designs (digital/analog), optimizes and documents IP/SoC development.
• Creates architectures, circuit specs, and system simulations based on requirements.
• Collaborates with software/hardware teams to meet system requirements and execution plans.
• Evaluates design flow from high-level design to synthesis, place and route and verification.

Skills

ASIC design

Verification

Integration

Scripting

Programming languages

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

RTL to GDS Flow

Virtuoso

EDA tools

Job description

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking an ASIC Engineer to define, model, design, optimize, verify, validate, implement, and document IP for high performance, low power products.

The role collaborates with software and hardware teams to meet system requirements and customer needs; requires hands-on experience with RTL to GDS flows and tools like Virtuoso. Minimum qualifications include a Bachelor's degree and 2+ years of ASIC design/verification experience; Master’s or PhD