Senior ASIC Engineer - IP/SoC Design & Leadership

QUALCOMM, Inc.; Austin (TX); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. in Austin is seeking an ASIC Engineer to define, model, and optimize high‑performance IP/SoC blocks. You will verify, validate, implement, and document complex digital/analog designs while collaborating with software, hardware, and program management teams to meet system requirements.

The role emphasizes designing with RTL/GDS flows and formal verification methods, delivering scalable solutions and clear technical documentation for leadership and peers.

Qualifications

• Bachelor's degree with 4+ years ASIC-related work experience or equivalent.
• Master's degree with 3+ years ASIC-related work experience.
• PhD with 2+ years ASIC-related work experience.

Responsibilities

• Define, model, design, verify, validate, implement, and document IP/ASIC blocks or SoCs.
• Create advanced architectures, circuit specs, logic designs and simulations.
• Collaborate with software, hardware, product and program teams to meet requirements.
• Evaluate design flows from high-level design to place, route, timing and power.
• Use RTL-to-GDS and Virtuoso to enable complex IC design.
• Write and review detailed technical documentation for projects.

Skills

ASIC design

Verification

Integration

Scripting

Leadership

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Tools

Virtuoso

RTL to GDS Flow

Job description

Qualcomm Technologies, Inc. in Austin is seeking an ASIC Engineer to define, model, and optimize high‑performance IP/SoC blocks. You will verify, validate, implement, and document complex digital/analog designs while collaborating with software, hardware, and program management teams to meet system requirements.

The role emphasizes designing with RTL/GDS flows and formal verification methods, delivering scalable solutions and clear technical documentation for leadership and peers.