Senior ASIC Design Engineer

ZipRecruiter; Milpitas (CA); On-site; USD 130,000 - 210,000; Full time

Job summary

A leading company is seeking a Senior ASIC Engineer to work on complex ASIC designs for point-to-multipoint wireless products. The role involves designing digital subsystems, RTL design using Verilog, and collaborating with various teams for integration and verification. Candidates should have a BSEE or MSEE and substantial experience in SoC design. Competitive salary and benefits are offered.

Benefits

Medical coverage

Dental coverage

Vision coverage

401K match

Flexible time off

Stock options

Qualifications

• 5-12 years of experience in SoC design.
• Experience with standard ASIC development tools.

Responsibilities

• Design and develop architecture of digital subsystems.
• RTL design of digital circuits using Verilog.
• Collaborate with Verification Engineers for specifications.

Skills

Verilog

C

Python

Communication

Education

BSEE or MSEE

Tools

Synthesis tools

Lint

CDC

Job description

This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point-to-multipoint wireless products.

Responsibilities:

1. Design and develop architecture and micro-architecture of digital subsystems.
2. RTL design of digital circuits using Verilog.
3. Frontend design development and integration of large ASIC designs, including integration of Processors, Bus, Memory, and Interface IPs.
4. Chip level integration and verification.
5. RTL design and integration of large functional blocks in the modem, focusing on power, performance, area, and timing goals.
6. Write detailed design documents, including interface and design descriptions.
7. Collaborate with Verification Engineers to develop specifications and test plans, ensuring robust design and complete coverage.
8. Coordinate with Emulation teams to test designs on various platforms.
9. Work with Software and Systems teams on system verification and integration.
10. Develop test cases and test benches to verify design functionality.

Required Skills & Experience:

• BSEE or MSEE degree.
• 5-12 years of experience in SoC design.
• Experience with Synthesis, Lint, CDC, and standard ASIC development tools.
• Proficiency in Verilog and C.
• Working knowledge of scripting languages such as Python.
• Excellent communication skills.

Additional Skills:

• Design or integration experience with ARM, MIPS, Risc-V, ARC, or other processors.
• Experience with DDR controllers.
• Knowledge of Digital Signal Processing or Channel Coding.
• Familiarity with wireless protocols such as 802.11a/b/g/n/ac or LTE/4G/5G.
• Experience with Ethernet packet processing.
• Embedded software development experience.
• Experience with emulation platforms and post-silicon bring-up.

Compensation and Benefits:

The salary range for this position is $130,000 to $210,000, depending on skills, experience, and location.

Benefits include medical, dental, and vision coverage, 401K match, flexible time off, and stock options.

About Us:

Since 2009, Tarana has been dedicated to providing affordable internet access worldwide. Our innovative G1 platform has been adopted globally, and we continue to grow with a talented team committed to making a positive impact.