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Synopsys is seeking an engineer to design and maintain PHYINIT software for DDR PHY IP, across multiple generations. You will write embedded firmware for training sequences and calibration, and collaborate to enable new DDR features.
You will debug bring-up on customer silicon, analyze logs, and streamline configuration generation through automation. The role requires a strong firmware background, C programming, and scripting in Python/Perl, with emphasis on debugging and RTL understanding.
Synopsys is seeking an engineer to design and maintain PHYINIT software for DDR PHY IP, across multiple generations. You will write embedded firmware for training sequences and calibration, and collaborate to enable new DDR features.
You will debug bring-up on customer silicon, analyze logs, and streamline configuration generation through automation. The role requires a strong firmware background, C programming, and scripting in Python/Perl, with emphasis on debugging and RTL understanding.