Senior Applications Engineer - VCS & Verification

Synopsys Inc; Sunnyvale (CA); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

Health benefits

Competitive compensation

Career development

Job summary

Synopsys Inc. is seeking a Senior Verification Engineer to lead VCS simulation deployments at customer sites and ensure smooth adoption within existing verification flows. You will diagnose complex mismatches, optimize performance, and translate field feedback into actionable product requirements.

The role emphasizes scripting in Perl/TCL/Shell and collaboration with R&D and customers across time zones to tape out next-generation silicon on schedule.

Qualifications

• Bachelor's degree or higher in electronics/computer engineering or related field.
• 5+ years in digital design verification or equivalent experience.
• Strong knowledge of SystemVerilog, UVM, SVA, and HDL languages.

Responsibilities

• Lead VCS simulation deployments at customer sites and integrate tools into existing flows.
• Diagnose simulation mismatches, performance bottlenecks, and verification environment issues using VCS, Verdi, and related debugging tools.
• Collaborate with field application engineers and R&D to translate customer pain points into product requirements and fixes.

Skills

SystemVerilog

UVM

SVA

Verilog

VHDL

Perl

TCL

Shell

Make

UNIX/Linux

VCS

Verdi

Education

Bachelor's in Electronics or Computer Engineering

Master's degree

Tools

Verdi

VCS

Job description

Synopsys Inc. is seeking a Senior Verification Engineer to lead VCS simulation deployments at customer sites and ensure smooth adoption within existing verification flows. You will diagnose complex mismatches, optimize performance, and translate field feedback into actionable product requirements.

The role emphasizes scripting in Perl/TCL/Shell and collaboration with R&D and customers across time zones to tape out next-generation silicon on schedule.