Senior AI/ML & HPC ASIC Design Engineer

Simplify

San Diego (CA)

On-site

USD 146,000 - 218,000

Full time

14 days+

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Benefits offered by this job

Annual discretionary bonus
RSU grants
Competitive benefits package

Job summary

Qualcomm Technologies, Inc. seeks an experienced ASIC engineer to drive RTL design, verification, and architecture for high-performance Compute/AI SoCs. You will work on server/datacenter IPs, speed and power optimizations, and scripting for process automation.

The ideal candidate has advanced degrees and 5+ years in ASIC design, with strong communication and collaboration skills to work across teams and roles.

Qualifications

  • Master's degree or PhD in a relevant engineering field with strong ASIC background.
  • Multiple years of experience in ASIC design, verification, and architecture.
  • Experience designing arithmetic and ML IPs is preferred.

Responsibilities

  • Hands-on: execute architecture and design of SOC per design protocol.
  • Identify and solve architecture, design and verification problems.
  • Develop and apply design and verification strategies for ASIC/SoC.
  • Contribute to flow improvements and automation in design processes.
  • Communicate effectively within teams and with peer groups; collaborate widely.
  • Provide feedback to improve design methodology and IP/SoC design.

Skills

Server/Data Center IPs
Arithmetic/Computational IPs
Speed and Power optimization
Architecture design
Design verification

Education

Master's degree in Electrical Engineering, Computer Science, or Computer Engineering
Bachelor's degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field

Tools

Scripting for process automation

Job description

Qualcomm Technologies, Inc. seeks an experienced ASIC engineer to drive RTL design, verification, and architecture for high-performance Compute/AI SoCs. You will work on server/datacenter IPs, speed and power optimizations, and scripting for process automation.

The ideal candidate has advanced degrees and 5+ years in ASIC design, with strong communication and collaboration skills to work across teams and roles.

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