Semiconductor Testsite Design Engineer

GlobalFoundries inc.

Essex Junction (VT)

On-site

USD 85,000 - 146,000

Full time

14 days+

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Job summary

GlobalFoundries inc. seeks a Testsite Design and Development professional to design in-house test chips and test structures, enabling characterization of next‑gen semiconductor technologies.

You will translate requirements into silicon implementations and collaborate across design, test, and manufacturing teams to accelerate maturity. You will plan electrical measurements, analyze silicon data, and iterate designs to improve learnings and measurement capability, documenting findings for

Qualifications

  • Bachelor's degree in a technical field and relevant semiconductor experience.
  • Experience with electrical characterization and silicon data interpretation.
  • Familiarity with IC design flows and verification methods, English proficient.

Responsibilities

  • Design and develop in-house test chips, testsites, and test structures for technology characterization.
  • Translate characterization needs into testsite requirements and silicon implementations.
  • Plan and execute electrical characterization of fabricated test chips and analyze results.
  • Collaborate with multiple teams to drive technology maturity and testsite optimization.
  • Document architecture, results, and conclusions for cross-functional stakeholders.

Skills

Semiconductor devices knowledge
IC design/layout
Electrical characterization
Silicon data analysis
Testchip design experience
English proficiency

Education

Bachelor's degree in Electrical Engineering or related field

Tools

EDA tools
Schematic capture / layout

Job description

GlobalFoundries inc. seeks a Testsite Design and Development professional to design in-house test chips and test structures, enabling characterization of next‑gen semiconductor technologies.

You will translate requirements into silicon implementations and collaborate across design, test, and manufacturing teams to accelerate maturity. You will plan electrical measurements, analyze silicon data, and iterate designs to improve learnings and measurement capability, documenting findings for

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