Security Silicon SoC/ASIC Verification Engineer

ZeroRISC; Boston (MA); On-site; USD 120,000 - 180,000; Full time

Job summary

zeroRISC seeks a SoC/ASIC Design Verification Engineer to develop, verify, and maintain silicon with root-of-trust tech. You’ll interact with customers to translate requirements into verification solutions and participate from architecture to tapeout and silicon validation.

You will collaborate with the world’s open silicon community, delivering robust security IP while advancing open secure silicon across platforms, including industrial and IoT deployments.

Qualifications

• 4+ years of verification experience in simulation-based methods or formal verification.
• Experience developing testbenches, test cases, and verification environments.
• Familiarity with regression testing, coverage closure, and debug of silicon designs.

Responsibilities

• Verify ASIC/SoC functionality, performance, security, and power across the design lifecycle.
• Build high-quality verification environments at chip/top and block levels.
• Create thorough verification documentation including test plans.
• Diagnose and resolve regression failures and other errors.
• Achieve coverage closure and ensure timely delivery with cross-functional teams.
• Collaborate with architecture, design, software, system and validation teams.

Skills

Verification planning

Testbench development

Debugging & troubleshooting

Education

Bachelor's degree in Electrical Engineering or Computer Science

Tools

UVM

SystemVerilog

Formal verification tools

Job description

zeroRISC seeks a SoC/ASIC Design Verification Engineer to develop, verify, and maintain silicon with root-of-trust tech. You’ll interact with customers to translate requirements into verification solutions and participate from architecture to tapeout and silicon validation.

You will collaborate with the world’s open silicon community, delivering robust security IP while advancing open secure silicon across platforms, including industrial and IoT deployments.