RTL Power/ Design Engineer Lead

AMD; Austin (TX); On-site; USD 192,000 - 289,000; Full time

Job summary

A leading company in semiconductor technology is seeking an RTL Power/ Design Engineer Lead in Austin, Texas. In this role, you will lead teams focused on power optimization for Data Center and Gaming GPUs, driving innovation and strategic decisions impacting product success. Ideal candidates will have expertise in silicon development and a strong background in power modeling.

Qualifications

• Expertise in frontend silicon development and RTL design.
• Experience in GPU or CPU low power design.
• Strong background in electrical circuits and VLSI.

Responsibilities

• Lead a team specializing in DGPU Power Optimization and Modeling.
• Collaborate with product teams to define PPA requirements.
• Mentor and develop a team of power optimization engineers.

Skills

Frontend silicon development

GPU low power design

Electrical circuits

VLSI fundamentals

Collaboration across global teams

Education

Bachelor’s degree in a related discipline

Tools

Power Artist

PTPX

Job description

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This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$192,480.00/yr - $288,720.00/yr

Role Overview

As RTL Power/ Design Engineer Lead, you will lead AMD’s Data Center and Gaming GPU Power Optimization and Modeling teams. You will drive innovation to help AMD succeed in these strategic areas, focusing on microarchitecture and RTL optimizations to meet power efficiency and performance goals. You will make strategic and tactical decisions impacting the product roadmap, execution, and market success.

Key Responsibilities

• Lead a team specializing in DGPU Power Optimization and Modeling
• Advance power optimization and modeling for multi-generational roadmaps to maximize performance per watt and cost efficiency
• Collaborate with product teams to define and meet PPA requirements, advocating for power efficiency
• Guide teams in identifying optimization opportunities, estimating ROI, and planning accordingly
• Optimize architecture and RTL to achieve optimal performance and power metrics
• Develop and review power test plans and data readouts
• Estimate and communicate power improvements at IP and SOC levels to leadership
• Mentor and develop a team of power optimization and modeling engineers

Qualifications

• Expertise in frontend silicon development, including architectural, uArch, and RTL design
• Experience in GPU or CPU low power design and power modeling
• Strong background in electrical circuits, VLSI, and IP design fundamentals
• Familiarity with ASIC/SoC design cycles and tools like Power Artist and PTPX
• Leadership experience at the principal or staff engineer level
• Ability to collaborate across global teams

Preferred Qualifications

• Experience in GPU/CPU power optimization and modeling
• Expertise in RTL and microarchitecture power efficiency
• Leadership in power-efficient design roadmaps
• Strong GPU performance analysis skills
• Experience with advanced power modeling tools
• Mentoring experience in engineering teams

Education

• Bachelor’s degree in a related discipline

Benefits are described in AMD benefits overview. AMD is an equal opportunity employer and encourages applications from diverse candidates. We accommodate applicants' needs throughout the recruitment process.