RTL Design Engineer for AI Chip Innovation

Normal Computing; New York (NY); On-site; USD 100,000 - 130,000; Full time

Job summary

Normal Computing in New York is seeking an RTL Design Engineer to design and verify digital logic for their innovative thermodynamic hardware. The engineer will work across the spectrum of RTL design, from microarchitecture to tapeout, using SystemVerilog and UVM. This role involves collaboration with architecture and physical design teams, ensuring the feasibility and correctness of designs.

This position is ideal for an engineer who has experience in both design and verification, and desires to shape architecture within a dynamic team environment.

Qualifications

• Hands-on experience writing production RTL in SystemVerilog and closing it.
• Experience with verification environments like UVM and cocotb.
• At least one tapeout experience.

Responsibilities

• Write and own synthesizable RTL in SystemVerilog.
• Author functional verification environments.
• Translate specifications into implementable microarchitectures.
• Collaborate on timing closure and design reviews.

Skills

Production RTL writing in SystemVerilog

Authoring verification environments in UVM

Tapeout experience

Debugging instincts

Collaboration with designers

Job description

Normal Computing in New York is seeking an RTL Design Engineer to design and verify digital logic for their innovative thermodynamic hardware. The engineer will work across the spectrum of RTL design, from microarchitecture to tapeout, using SystemVerilog and UVM. This role involves collaboration with architecture and physical design teams, ensuring the feasibility and correctness of designs.

This position is ideal for an engineer who has experience in both design and verification, and desires to shape architecture within a dynamic team environment.