RISC-V Silicon Architect & RTL Lead

Insight Global; New York (NY); On-site; USD 120,000 - 180,000; Full time

Job summary

Insight Global is seeking a Silicon Engineer for a position with one of our largest tech clients. You will lead microarchitecture and RTL development for a RISC-V core, using Chisel and SystemVerilog, and drive design quality from architecture through tapeout.

The role requires deep RTL skills, experience with Verilog/SystemVerilog and RTL quality practices, and collaboration with DV and software teams to ensure optimal performance, power, and area.

Qualifications

• Proven silicon architecture and RTL ownership experience across large IP blocks or SoC components from architecture through tapeout.
• Deep expertise in Verilog/SystemVerilog with RTL quality methodologies including linting, verification, synthesis, and release signoff processes.
• Experience developing for GPU or ML accelerators.

Responsibilities

• Write microarchitecture/RTL for RISC-V core in Chisel/SystemVerilog.
• Analyze power, performance, and area to identify design improvements.
• Collaborate with DV/software teams to ensure programs run correctly and optimally.

Skills

Silicon architecture

Verilog/SystemVerilog

RTL methodologies

GPU/ML accelerators

Synopsys VCS/Design Compiler

Job description

Insight Global is seeking a Silicon Engineer for a position with one of our largest tech clients. You will lead microarchitecture and RTL development for a RISC-V core, using Chisel and SystemVerilog, and drive design quality from architecture through tapeout.

The role requires deep RTL skills, experience with Verilog/SystemVerilog and RTL quality practices, and collaboration with DV and software teams to ensure optimal performance, power, and area.