RISC-V CPU IP Engineer – New Grad

GlobalFoundries inc.; Santa Clara (CA); On-site; USD 86,000 - 170,000; Full time

Job summary

GlobalFoundries is seeking a New College Graduate CPU IP Design & Verification Engineer to join the MIPS CPU IP Engineering team and advance RISC-V processor IP. You will engage in microarchitecture, SystemVerilog RTL, and functional verification, with hands-on experience in power, performance, and area analysis, automation, and debug.

Responsibilities include developing RTL, verification tests, and Python/C/C++ automation, collaborating with cross-functional teams, and supporting optimization

Qualifications

• Bachelor’s, Master’s, or PhD in Electrical or Computer Engineering or related field.
• Overall 3.0 GPA and good academic standing.

Responsibilities

• Design and develop RISC-V CPU microarchitecture and SystemVerilog RTL design.
• Develop verification tests, assertions, checkers, and functional coverage.
• Run simulations, regressions, and debug failures using logs and waveforms.
• Collaborate across architecture, design, verification, and implementation teams.

Skills

Digital logic design

CPU architecture

Verilog/SystemVerilog

Python

C/C++

Debugging

English proficiency

MIPS CPU IP engineering

Education

Bachelor’s / Master’s / PhD in Electrical or Computer Engineering

GPA 3.0 or higher

Tools

SystemVerilog

UVM

Git

Linux

Job description

GlobalFoundries is seeking a New College Graduate CPU IP Design & Verification Engineer to join the MIPS CPU IP Engineering team and advance RISC-V processor IP. You will engage in microarchitecture, SystemVerilog RTL, and functional verification, with hands-on experience in power, performance, and area analysis, automation, and debug.

Responsibilities include developing RTL, verification tests, and Python/C/C++ automation, collaborating with cross-functional teams, and supporting optimization