RISC-V CPU IP Design & Verification Engineer (New Grad)

GlobalFoundries inc.; Austin (TX); On-site; USD 86,000 - 170,000; Full time

Job summary

GlobalFoundries is seeking a New College Graduate CPU IP Design & Verification Engineer to join the MIPS CPU IP Engineering team in Austin, TX or Santa Clara, CA. You’ll develop and verify advanced RISC-V processor IP, work on SystemVerilog RTL, and contribute to power, performance, and area optimization.

The role offers hands-on CPU microarchitecture experience, debugging via logs and traces, and collaboration across architecture, design, and verification teams.

Qualifications

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field from an accredited program.
• Must have ≥3.0 GPA and good academic standing.

Responsibilities

• Design and develop RISC-V CPU microarchitecture and SystemVerilog RTL.
• Develop verification tests, assertions, and functional coverage for CPU features.
• Run simulations, diagnose failures using logs and waveforms, and debug issues.
• Support power, performance, and area analyses and optimization.
• Collaborate with architecture, design, verification, and performance teams.

Skills

Verilog/SystemVerilog

Python

C/C++

Digital logic design

Computer architecture

Debugging

English proficiency

Education

Bachelor’s/Master’s/PhD in Electrical or Computer Engineering

Tools

SystemVerilog/UVM

Git

Linux

Job description

GlobalFoundries is seeking a New College Graduate CPU IP Design & Verification Engineer to join the MIPS CPU IP Engineering team in Austin, TX or Santa Clara, CA. You’ll develop and verify advanced RISC-V processor IP, work on SystemVerilog RTL, and contribute to power, performance, and area optimization.

The role offers hands-on CPU microarchitecture experience, debugging via logs and traces, and collaboration across architecture, design, and verification teams.