RFIC Layout Engineer: Pushing Wireless Silicon Frontiers

Socket.dev; Irvine (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

Socket.dev in Irvine, CA is seeking a Senior Layout Engineer to drive block-level and top-level layout, coordinating with cross-functional teams to deliver highly integrated wireless silicon designs that meet performance and power targets.

The role involves leading verification flows, including extraction, DRC, LVS, and DFM checks, collaborating on floorplanning, and guiding other layout engineers to ensure on-time integration and high-quality results.

Qualifications

• Bachelor's degree required, understanding RC delay, electromigration and coupling.
• Ability to recognize failure-prone circuit and layout structures and work with circuit designers.
• Strong communication and ability to work with multi-functional teams.

Responsibilities

• Block-level and top-level layout through full verification flow, including extraction, DRC, LVS, and DFM checking.
• Co-work with designers on block-level and top-level floorplanning.
• Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling.
• Top-level layout integration and verification, schedule management.

Skills

Communication skills

Cross-functional teamwork

Education

Bachelor's degree

Tools

Cadence layout tools

PERL

SKILL

Job description

Socket.dev in Irvine, CA is seeking a Senior Layout Engineer to drive block-level and top-level layout, coordinating with cross-functional teams to deliver highly integrated wireless silicon designs that meet performance and power targets.

The role involves leading verification flows, including extraction, DRC, LVS, and DFM checks, collaborating on floorplanning, and guiding other layout engineers to ensure on-time integration and high-quality results.