RFIC Design Engineer – Wireless SoC Innovation

Apple, Inc.; Waltham (MA); On-site; USD 135,000 - 250,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Employee stock purchase plan

Relocation assistance

Education reimbursement

Bonuses/commissions eligibility

Discounted products and free services

Job summary

Apple seeks an RFIC Design Engineer in Waltham, MA to architect, design, and validate high‑performance wireless transceivers for the next generation of wireless SoCs. You will drive transistor‑level studies, deliver TX/RX/LOGEN blocks, and work with RF/Analog, Systems, and FW/SW teams to optimize performance across the product.

Minimum BS plus 3+ years in analog/RF design; proficiency with Cadence Virtuoso, Spectre RF, Matlab, and EM tools is required.

Qualifications

• BS and 3+ years of relevant industry experience.
• Understanding of analog design concepts such as noise analysis, linearity, mismatch, stability, and other analog impairments.
• Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.
• Expertise in analog, mixed-signal, and RF circuit design. This includes the design of LNAs, PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters and amplifiers, data converters, and calibration methods related to high-performance wireless systems.
• Experienced in Silicon characterization and debugging.

Responsibilities

• Hands-on design contributions, from concept, architecture, and topology to transistor-level feasibility studies, power, area and performance trade‑off analysis to actual design, simulations, and extractions.
• Design and deliver radio transceiver building blocks and chains, including TX, RX, and PLL‑LOGen for wireless connectivity products.
• Work closely with RF Systems on block‑level and high‑level specifications of the TX RX line‑ups and PLL‑LOGen and on the accurate distribution of spec margins in the chain.
• Design of RF and Analog loopbacks for calibration and compensation.
• Work through Co‑Existence scenarios and design to meet the CoEx requirements.
• We collaborate closely with RFIC test engineers in the setup, debugging, and optimization of the wireless connectivity chip throughout productization.
• Provide design versus silicon measurements correlation and compliance with specifications for volume production.

Skills

Analog/RF design concepts

Cadence Virtuoso

Spectre RF

Matlab

EM simulation

Silicon characterization

Team collaboration

Education

BS in Electrical Engineering

MSEE

PhD (preferred)

Tools

Cadence Virtuoso

Spectre RF

Matlab

EM simulation tools

Job description

Apple seeks an RFIC Design Engineer in Waltham, MA to architect, design, and validate high‑performance wireless transceivers for the next generation of wireless SoCs. You will drive transistor‑level studies, deliver TX/RX/LOGEN blocks, and work with RF/Analog, Systems, and FW/SW teams to optimize performance across the product.

Minimum BS plus 3+ years in analog/RF design; proficiency with Cadence Virtuoso, Spectre RF, Matlab, and EM tools is required.