Innovative RFIC Design Engineer for Wireless SoCs

Apple Inc.; Irvine (CA); On-site; USD 142,000 - 214,000; Full time

Benefits offered by this job

Employee stock programs

Relocation assistance

Tuition reimbursement

Medical and dental coverage

Job summary

Apple Inc. is seeking an RFIC Design Engineer within the Wireless Radio team to craft RF transceivers and integrate them into wireless SoCs for mass production.

You will design TX/RX and PLL blocks, verify with silicon measurements, and collaborate with RF/Analog/System groups to ensure productization readiness and performance targets across devices. You'll analyze trade-offs, participate in debugging, and contribute to calibration methods to maintain tight margins in volume manufacturing.

Qualifications

• BS degree and 3+ years in RF/analog/mixed-signal design.
• Understanding of noise, linearity, mismatch, stability.
• Experience with Cadence Virtuoso, Spectre RF, Matlab, and EM simulations.
• RF/analog mixed-signal design in RF CMOS.
• Experience with silicon characterization and debugging.

Responsibilities

• Provide RFIC designs for wireless SoC and drive to mass production.
• Contribute from concept to transistor-level feasibility and trade-off analyses.
• Design TX/RX/PLL-LOGen blocks and calibration methods.
• Collaborate with RF Systems on specs and margins.
• Work with RFIC test engineers during productization.
• Verify design versus silicon and ensure production compliance.

Skills

RF/mixed-signal design

Transceiver architectures knowledge

Signal integrity concepts

Education

BS in Electrical Engineering or related

MS EE or PhD (preferred)

Tools

Cadence Virtuoso

Spectre RF

Matlab

EM simulation (EMX, HFSS)

Job description

Apple Inc. is seeking an RFIC Design Engineer within the Wireless Radio team to craft RF transceivers and integrate them into wireless SoCs for mass production.

You will design TX/RX and PLL blocks, verify with silicon measurements, and collaborate with RF/Analog/System groups to ensure productization readiness and performance targets across devices. You'll analyze trade-offs, participate in debugging, and contribute to calibration methods to maintain tight margins in volume manufacturing.