RFIC Design Engineer: Wireless Transceiver Innovator

Apple Inc.

Waltham (MA)

On-site

USD 142,300 - 263,300

Full time

14 days+

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Benefits offered by this job

Stock options
Relocation assistance
Tuition reimbursement
Medical and dental coverage
Employee stock purchase plan

Job summary

Apple Inc. is seeking an RFIC Design Engineer within the Wireless Radio team in the United States. You will craft RFIC designs for wireless SoCs, guiding them from concept through to mass production, including TX/RX blocks and PLL‑LOGen for wireless connectivity.

Requirements include a BS in EE with 3+ years in analog/RF design, strong CADENCE tool experience, and silicon characterization expertise. Relocation and comprehensive benefits are offered.

Qualifications

  • BS in Electrical Engineering with 3+ years in RF/analog design.
  • Knowledge of noise, linearity, mismatch, stability and analog impairments.
  • Experience with Cadence tools and RF/SI simulations.
  • Experience in silicon characterization and debugging.

Responsibilities

  • Provide RFIC designs for wireless SoC and drive to mass production.
  • Hands-on design contributions from concept to transistor-level feasibility studies.
  • Design and deliver radio transceiver blocks including TX/RX and PLL-LOGen.
  • Work with RF Systems on TX/RX specs and margins.
  • Design RF/Analog loopbacks for calibration and compensation.
  • Collaborate with RFIC test engineers for setup, debugging, and optimization.
  • Provide design vs silicon measurement correlation and ensure spec compliance.

Skills

Analog RF circuit design
LNA/PA/PLL/VCO/LOGEN design
RF transceiver architectures
Silicon characterization

Education

Bachelor's degree in Electrical Engineering

Tools

Cadence Virtuoso
Spectre RF
Matlab
EM simulation (EMX, HFSS)
AMS
Nanotime

Job description

Apple Inc. is seeking an RFIC Design Engineer within the Wireless Radio team in the United States. You will craft RFIC designs for wireless SoCs, guiding them from concept through to mass production, including TX/RX blocks and PLL‑LOGen for wireless connectivity.

Requirements include a BS in EE with 3+ years in analog/RF design, strong CADENCE tool experience, and silicon characterization expertise. Relocation and comprehensive benefits are offered.

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