RF/PHY Mixed-Signal Verification Engineer

Saigepartners; San Jose (CA); Hybrid; USD 120,000 - 160,000; Full time

Job summary

Saige Partners is seeking an AMS/DMS Verification Engineer to develop and support mixed-signal verification environments for wireless RF and high-speed PHY technologies. You will collaborate with RF, analog, and digital design teams to create robust testbenches, develop circuit models, and support silicon bring-up through commercialization.

You will implement Verilog/SystemVerilog and RNM models, run digital and mixed-signal simulations, analyze results, and debug waveform issues while

Qualifications

• BS or BE in Electrical Engineering, Computer Engineering, or a related technical field.
• 3+ years of relevant industry experience in digital, analog/mixed-signal verification, or VLSI.
• Deep understanding of digital VLSI simulation and verification flows.
• Strong understanding of mixed-mode and analog simulation methodologies.
• Hands-on experience with Verilog and SystemVerilog.
• Experience with Real Number Modeling (RNM) and mixed-signal verification.
• Experience with digital verification methodologies, including UVM.
• Strong waveform debug and simulation troubleshooting skills.
• Excellent written and verbal communication skills.
• Strong teamwork, interpersonal skills, dedication, and ability to collaborate effectively in a cross-functional engineering environment.

Responsibilities

• Develop and maintain AMS/DMS testbenches for wireless RF and high-speed PHY designs.
• Build comprehensive mixed-signal verification environments to validate analog, digital, and mixed-signal functionality.
• Collaborate with RF and analog design engineers to develop, integrate, and validate analog circuit models.
• Develop and maintain Verilog/SystemVerilog and RNM models for verification.
• Execute digital and mixed-signal simulations and analyze results to identify and resolve design issues.
• Perform waveform analysis and debug simulation failures across analog and digital domains.
• Work closely with cross-functional engineering teams throughout the verification lifecycle.
• Support silicon bring-up, validation, and commercialization activities.
• Contribute to verification methodologies, test strategies, documentation, and continuous process improvements.

Skills

Digital verification

Analog/mixed-signal verification

Teamwork

Communication

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

Tools

Verilog/SystemVerilog

RNM

UVM

Job description

Saige Partners is seeking an AMS/DMS Verification Engineer to develop and support mixed-signal verification environments for wireless RF and high-speed PHY technologies. You will collaborate with RF, analog, and digital design teams to create robust testbenches, develop circuit models, and support silicon bring-up through commercialization.

You will implement Verilog/SystemVerilog and RNM models, run digital and mixed-signal simulations, analyze results, and debug waveform issues while