RF/Analog IC Design Lead

Qualcomm; Santa Clara (CA); On-site; USD 168,600 - 252,800; Full time

Job summary

Qualcomm Atheros, Inc. is seeking an experienced RFIC Design Engineer to define and develop complex RFICs for wireless applications.

The role emphasizes transistor-level design, simulation-driven verification, and collaboration with cross-functional teams to meet stringent performance targets for 4G, 5G, WLAN, BT and GPS standards. You will lead circuit-level specifications, drive module architecture, perform advanced RFIC engineering, and contribute to documentation and test plans.

Qualifications

• Bachelor's degree in Electrical Engineering with 3+ years of RF/Analog circuit design for wireless products and 4+ years of ASIC design/verification.
• Master's degree in Electrical Engineering with 4+ years of ASIC design/verification experience.
• PhD in Electrical Engineering with 2+ years of ASIC design/verification experience.
• 2+ years using two or more of Cadence, Virtuoso, or ADS.

Responsibilities

• Leads others and defines circuit-level specifications from system-level requirements.
• Develops module-level architecture and design of complex blocks using RFIC engineering practices.
• Runs simulations to evaluate circuit performance under various conditions.
• Collaborates with layout engineers for floorplan layout and physical verification.

Skills

RF/Analog design

ASIC design

Verification

Cadence tools

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence

Virtuoso

ADS

Job description

Qualcomm Atheros, Inc. is seeking an experienced RFIC Design Engineer to define and develop complex RFICs for wireless applications.

The role emphasizes transistor-level design, simulation-driven verification, and collaboration with cross-functional teams to meet stringent performance targets for 4G, 5G, WLAN, BT and GPS standards. You will lead circuit-level specifications, drive module architecture, perform advanced RFIC engineering, and contribute to documentation and test plans.