Senior Wireless SoC & RTL Design Engineer

Qualcomm; Santa Clara (CA); On-site; USD 147,000 - 190,000; Full time

Job summary

Qualcomm Atheros, Inc. is seeking an experienced ASIC engineer to independently plan and execute digital architecture, Verilog RTL coding, and verification for next-generation wireless and wired SoCs. You will design, verify, and deliver complex ASICs through functional specs to production.

The role includes high-speed digital and mixed-signal board design, testing, and cross-functional collaboration. The position requires advanced education in Electrical/Computer Engineering or CS, with

Qualifications

• Master's degree (or foreign equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related field.

Responsibilities

• Plan and perform the design and verification of next-generation wireless and wired ASICs from specification to product.
• Contribute to high-speed digital and mixed-signal board design, layout reviews, and production support.
• Test, debug, and document test data; present results to cross-functional teams.
• Participate in design reviews and project meetings to ensure performance and power goals.

Education

Master's degree in Electrical Engineering or related field

Job description

Qualcomm Atheros, Inc. is seeking an experienced ASIC engineer to independently plan and execute digital architecture, Verilog RTL coding, and verification for next-generation wireless and wired SoCs. You will design, verify, and deliver complex ASICs through functional specs to production.

The role includes high-speed digital and mixed-signal board design, testing, and cross-functional collaboration. The position requires advanced education in Electrical/Computer Engineering or CS, with