Research Engineer – AI Hardware & Chip Design (ASIC/RTL)

Anysilicon; San Francisco (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Anthropic is seeking a Research Engineer to enhance models' abilities in hardware design, focusing on silicon design and RL-environment development. The role involves RTL generation and verification, physical design optimization, and formal verification, with emphasis on integrating research into production training runs.

Candidates should have a bachelor’s degree or equivalent, expertise in ASIC/FPGA design, and fluency with industry EDA tools.

Qualifications

• Bachelor’s degree or equivalent in a relevant field.
• Expertise in ASIC or FPGA design, including RTL and design verification.
• Experience with physical design processes such as synthesis and timing closure.
• Fluency with industry EDA tools and processes.
• Experience in chip design from specification to silicon.

Responsibilities

• Invent, design, and implement RL environments for RTL generation and verification.
• Optimize physical design and conduct formal verification.
• Work on EDA-tool latency optimization and proxy rewards.
• Conduct experiments and shape the research roadmap.
• Deliver work into research and production training runs.
• Collaborate with researchers and engineers across Anthropic.

Skills

Reinforcement learning

ML accelerators

Architecture simulators

Education

Bachelor’s degree or equivalent in a relevant field

Tools

EDA tools

ASIC/FPGA tooling

RTL design

Job description

Anthropic is seeking a Research Engineer to enhance models' abilities in hardware design, focusing on silicon design and RL-environment development. The role involves RTL generation and verification, physical design optimization, and formal verification, with emphasis on integrating research into production training runs.

Candidates should have a bachelor’s degree or equivalent, expertise in ASIC/FPGA design, and fluency with industry EDA tools.