Remote Senior ASIC Verification Engineer – UVM & SV

K2 Space Corporation; United States; Remote; USD 170,000 - 250,000; Full time

Benefits offered by this job

Equity in the company

Comprehensive benefits package

Paid time off

Job summary

K2 Space Corporation is looking for a Senior ASIC Design Verification Engineer to verify our custom silicon designs. The role involves defining verification approaches and collaborating closely with various teams.

Ideal candidates will have a strong foundation in SystemVerilog and digital logic, along with 5+ years of ASIC/SoC verification experience. A competitive salary and comprehensive benefits are offered.

Qualifications

• 5+ years of experience in ASIC/SoC verification.
• Solid understanding of SystemVerilog and digital logic.
• Experience with regression management and coverage analysis.

Responsibilities

• Develop and execute verification plans for block-level and full-chip environments.
• Write SystemVerilog Assertions and integrate formal verification.
• Run simulations and collaborate with RTL designers to resolve issues.

Skills

SystemVerilog

Digital logic

RTL design

Hardware verification flows

Simulation tools (VCS, Xcelium, Questa)

Scripting languages (Python, Perl, TCL)

UVM-based testbench development

Education

B.S. or M.S. in Electrical Engineering or Computer Engineering

Tools

Verdi

SimVision

Git

Job description

K2 Space Corporation is looking for a Senior ASIC Design Verification Engineer to verify our custom silicon designs. The role involves defining verification approaches and collaborating closely with various teams.

Ideal candidates will have a strong foundation in SystemVerilog and digital logic, along with 5+ years of ASIC/SoC verification experience. A competitive salary and comprehensive benefits are offered.