Remote Principal HW Design Engineer - Wireless Baseband

IC Resources

Irvine (CA)

Remote

USD 180,000 - 260,000

Full time

2 days ago
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Benefits offered by this job

Annual performance bonus
Stock options
401(k)

Job summary

IC Resources seeks a Principal Hardware Design Engineer for wireless baseband ASIC/FPGA work. You will own micro-architecture, guide RTL development, and drive high-throughput design from architecture to silicon and FPGA delivery.

You will collaborate with algorithm, systems and customer teams, oversee verification, and mentor engineers while occasional travel to Irvine, CA is required for hands-on lab work.

Qualifications

  • 10+ years of industry experience delivering ASIC/FPGA products
  • Expert level Verilog/SystemVerilog skills
  • Proven ability to lead complex, mission-critical designs
  • Strong timing closure, power and resource optimization skills
  • Experience defining architecture for large designs and mentoring teams
  • Excellent technical writing and cross-team communication skills

Responsibilities

  • Own micro-architecture for major subsystems and translate requirements into RTL
  • Lead architectural trade studies across performance, area, power and resources
  • Set RTL design direction across ASIC/FPGA targets and establish standards
  • Guide block/system verification environments with the verification team
  • Drive deployment and validation on FPGA platforms and system integration
  • Mentor senior engineers and act as a design reviewer across projects
  • Engage with customers on integration, requirements and roadmap
  • Identify and lead improvements to design flows and tooling

Skills

ASIC/FPGA design
Verilog
SystemVerilog
RTL design
Timing closure
Architectural trade studies
Mentoring
Customer collaboration
Design reviews
Digital signal processing

Tools

UVM
AMBA/AXI interconnects
C++/SystemC

Job description

IC Resources seeks a Principal Hardware Design Engineer for wireless baseband ASIC/FPGA work. You will own micro-architecture, guide RTL development, and drive high-throughput design from architecture to silicon and FPGA delivery.

You will collaborate with algorithm, systems and customer teams, oversee verification, and mentor engineers while occasional travel to Irvine, CA is required for hands-on lab work.

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