Remote FPGA/ASIC Design Engineer (Digital & Mixed-Signal)

Averro; United States; Remote; USD 154,000 - 165,000; Full time

Benefits offered by this job

Medical Insurance

Dental Insurance

Vision Insurance

401k

Sick leave

Employee assistance program

PTO

Job summary

Averro is seeking an FPGA/ASIC Electrical Design Engineer for a remote, 6-month contract with potential contract-hire. You will work on space-grade hardware, designing digital ASICs and FPGAs, and leading verification efforts.

The role requires hands-on HDL design, testbench development, and collaboration with cross-functional teams to ensure timing closures and robust validation. Remote work and competitive benefits are offered.

Qualifications

• 7+ years of ASIC and FPGA design experience.
• Proficiency in HDL (VHDL/Verilog/SystemVerilog) and Linux.

Responsibilities

• Design and develop digital ASICs, FPGAs, and mixed-signal ASICs using HDL (VHDL, Verilog, SystemVerilog).
• Develop and execute verification methodologies, test benches, test plans, and coverage models for comprehensive validation.
• Perform timing, noise, and signoff analysis; support lab integration, troubleshooting, and system validation.
• Collaborate with cross-functional teams and resolve design challenges related to timing, congestion, and implementation.

Skills

HDL fluency

FPGA design

Digital/mixed-signal design

Verification testbenches

Timing analysis

Education

Bachelor's degree in Electrical/Computer Engineering

MS/PhD in Electrical/Computer Engineering

Tools

VHDL

Verilog

SystemVerilog

Linux

EDA tools

Job description

Averro is seeking an FPGA/ASIC Electrical Design Engineer for a remote, 6-month contract with potential contract-hire. You will work on space-grade hardware, designing digital ASICs and FPGAs, and leading verification efforts.

The role requires hands-on HDL design, testbench development, and collaboration with cross-functional teams to ensure timing closures and robust validation. Remote work and competitive benefits are offered.