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Tenstorrent is seeking an experienced DFT engineer to lead chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIP programs. You will implement scan chains, memory BIST, and JTAG for manufacturing test and silicon debugging, working with RTL, physical design, and verification teams to ensure testability across the design flow.
The role requires 10+ years in DFT, expertise with Synopsys and Siemens tools, and scripting in TCL/Python.
Tenstorrent is seeking an experienced DFT engineer to lead chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIP programs. You will implement scan chains, memory BIST, and JTAG for manufacturing test and silicon debugging, working with RTL, physical design, and verification teams to ensure testability across the design flow.
The role requires 10+ years in DFT, expertise with Synopsys and Siemens tools, and scripting in TCL/Python.