Remote ASIC Verification Engineer - SoC & AI Accelerators

Anysilicon

Chandler (AZ)

Hybrid

USD 110,000 - 160,000

Full time

21 hours ago
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Job summary

Encore Semi, Inc. in Chandler, AZ is seeking a mid-level ASIC Verification Engineer to lead verification efforts for next-generation networking and AI accelerators.

This remote position is open to US Citizens or Lawful Permanent Residents and offers a competitive salary along with comprehensive benefits. The role requires building robust verification environments, planning test strategies, and mentoring junior engineers.

Qualifications

  • 4+ years of ASIC/SoC verification experience with SystemVerilog and UVM.
  • Experience in multi-clock and reset-domain designs.
  • Bachelor’s in EE/CE/CS; Master’s preferred.
  • Experience verifying high-speed networking tech (optional).

Responsibilities

  • Lead end-to-end ASIC/SoC verification from planning through coverage and signoff.
  • Build and enhance UVM/SystemVerilog verification environments at block, subsystem, and SoC levels.
  • Create verification plans, develop test cases, execute regressions, and resolve RTL issues.
  • Collaborate cross-functionally with ASIC design, hardware, and post-silicon teams to ensure first-pass silicon success.
  • Mentor engineers, promote verification best practices, and utilize AI-driven tools to enhance productivity.

Skills

ASIC/SoC verification
UVM/SystemVerilog
Cross-functional collaboration
Mentoring and best practices
Scripting languages (Python Tcl Perl,

Education

Bachelor’s degree in electrical engineering, Computer Engineering, or Computer Science
Master’s degree preferred

Tools

VCS
Verdi
Git/SVN

Job description

Encore Semi, Inc. in Chandler, AZ is seeking a mid-level ASIC Verification Engineer to lead verification efforts for next-generation networking and AI accelerators.

This remote position is open to US Citizens or Lawful Permanent Residents and offers a competitive salary along with comprehensive benefits. The role requires building robust verification environments, planning test strategies, and mentoring junior engineers.

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