R&D FPGA Engineer - Hybrid, HDL & Verification

Mission Driven Search

Los Angeles, Northern (CA, KY)

Hybrid

USD 110,000 - 160,000

Full time

10 days ago

Get a reply from this recruiter

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Mission Driven Search is seeking an R&D Engineer to join the team and contribute to design, simulation, prototyping, and testing of wireless communication and sensing projects. The role reports to the R&D Engineering Director and requires hands-on work across HDL, FPGA, and verification tasks.

The position follows a hybrid schedule with a minimum of three onsite days per week (Mondays, Wednesdays, Thursdays).

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Science, or a relevant field with 4 years FPGA design/testing experience or 2 years with an MS or higher.
  • Demonstrated experience with multiple clock-domain, high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • Experience with TCL or Python.

Responsibilities

  • Architect testbenches for full-system HDL simulations.
  • Maintain and improve HDL testing infrastructure.
  • Automate testing with scripts.
  • Collect and use code coverage data from test suites.
  • Design and code HDL blocks.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.

Skills

FPGA design
HDL testing/verification
Clock-domain design
Xilinx FPGAs
Vivado IDE
Python
Tcl

Education

Bachelor of Science in Electrical Engineering, Computer Science, or relevant field
MS or advanced degree

Tools

Vivado IDE
Xilinx FPGAs/SoCs

Job description

Mission Driven Search is seeking an R&D Engineer to join the team and contribute to design, simulation, prototyping, and testing of wireless communication and sensing projects. The role reports to the R&D Engineering Director and requires hands-on work across HDL, FPGA, and verification tasks.

The position follows a hybrid schedule with a minimum of three onsite days per week (Mondays, Wednesdays, Thursdays).

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Hybrid FPGA R&D Engineer – HDL & Verification
Hybrid FPGA R&D Engineer – HDL & Verification

Tom Trese Networking LLC • Los Angeles (CA)

Hybrid
USD 100,000 - 130,000
R&D Engineer
R&D Engineer

H.T. Prof Executive Search • Los Angeles (CA)

On-site
USD 110,000 - 160,000
R&D Engineer
R&D Engineer

Keystone Distinction Group • Los Angeles (CA), Northern (KY)

Hybrid
USD 100,000 - 130,000
R&D Engineer
R&D Engineer

Tom Trese Networking LLC • Los Angeles (CA)

On-site
USD 100,000 - 130,000
R&D Engineer
R&D Engineer

Mission Driven Search • Los Angeles (CA), Northern (KY)

Hybrid
USD 110,000 - 160,000
Hybrid R&D FPGA Engineer – Wireless/HDL Prototyping
Hybrid R&D FPGA Engineer – Wireless/HDL Prototyping

Keystone Distinction Group • Los Angeles (CA)

Hybrid
USD 100,000 - 130,000
FPGA R&D Engineer - HDL, Xilinx & Testbenches
FPGA R&D Engineer - HDL, Xilinx & Testbenches

H.T. Prof Executive Search • Los Angeles (CA)

Hybrid
USD 110,000 - 160,000
RF FPGA Engineer — Real-Time DSP for Wireless and Radar
RF FPGA Engineer — Real-Time DSP for Wireless and Radar

Muon Space • San Jose (CA)

Hybrid
USD 173,000 - 196,000
Equity compensation
3 weeks paid vacation
12 paid holidays
+2
Remote/Hybrid FPGA Verification Engineer — Aerospace
Remote/Hybrid FPGA Verification Engineer — Aerospace

Sopra Steria • East Hartford (CT)

Hybrid
USD 70,000 - 95,000
Annual cash bonus opportunity
Training/Professional Development
6 paid holidays
+2
FPGA Firmware Engineer — Real-Time RF Sensing (Hybrid)
FPGA Firmware Engineer — Real-Time RF Sensing (Hybrid)

Hidden Level • City of Syracuse (NY)

On-site
USD 85,000 - 90,000
Health insurance
Parental leave
Flexible time off
+4