FPGA R&D Engineer - HDL, Xilinx & Testbenches

H. T. PROF Group; Los Angeles (CA); Hybrid; USD 110,000 - 160,000; Full time

Job summary

A technology solutions provider is seeking a full-time R&D Engineer based in Los Angeles. The role involves designing, simulating, and testing wireless communication systems, with responsibilities including architecture of HDL simulations and automation of testing via scripts. The ideal candidate holds a relevant Bachelor's degree and has significant FPGA design experience, along with proficiency in tools like Xilinx and Vivado. This position follows a hybrid work model, requiring at least three onsite days each week.

Qualifications

• 4 years of experience in FPGA design and testing/verification or 2 years with an MS.
• Proven experience with multiple clock-domain FPGA designs.
• Experience with Tcl or Python scripting.

Responsibilities

• Architect testbenches for full-system HDL simulations.
• Maintain and improve existing HDL testing infrastructure.
• Automate testing processes using scripts.

Skills

FPGA design

HDL testing

Python

Automation scripting

Communication systems

Education

Bachelor of Science in Electrical Engineering or Computer Science

Master of Science in Electrical Engineering

Tools

Xilinx FPGAs

Vivado IDE

MATLAB

Job description

A technology solutions provider is seeking a full-time R&D Engineer based in Los Angeles. The role involves designing, simulating, and testing wireless communication systems, with responsibilities including architecture of HDL simulations and automation of testing via scripts. The ideal candidate holds a relevant Bachelor's degree and has significant FPGA design experience, along with proficiency in tools like Xilinx and Vivado. This position follows a hybrid work model, requiring at least three onsite days each week.