Hybrid FPGA R&D Engineer – HDL & Verification

Tom Trese; Los Angeles (CA); Hybrid; USD 100,000 - 130,000; Full time

Job summary

A leading engineering firm is seeking a full-time R&D Engineer in Los Angeles. This role involves designing and testing wireless communication projects. Candidates should have a Bachelor's degree in Electrical Engineering or related fields and a strong background in FPGA design. The position requires at least 4 years of applicable experience, proficiency in Xilinx tools, and familiarity with coding in TCL or Python. The salary range is competitive, estimated from $100,000 to $130,000 annually.

Qualifications

• Bachelor's degree in relevant field plus 4 years experience in FPGA design.
• Experience with multiple clock-domain, high-utilization FPGA designs.
• Familiarity with logic analyzers for hardware verification.

Responsibilities

• Architect testbenches for full-system HDL simulations.
• Maintain and improve HDL testing infrastructure.
• Automate testing using scripts.

Skills

FPGA design expertise

Experience with Xilinx FPGAs

Proficiency in TCL or Python

Knowledge of digital signal processing

Education

Bachelor of Science in Electrical Engineering or relevant field

Master of Science in Electrical Engineering (preferred)

Tools

Vivado IDE

MATLAB

Job description

A leading engineering firm is seeking a full-time R&D Engineer in Los Angeles. This role involves designing and testing wireless communication projects. Candidates should have a Bachelor's degree in Electrical Engineering or related fields and a strong background in FPGA design. The position requires at least 4 years of applicable experience, proficiency in Xilinx tools, and familiarity with coding in TCL or Python. The salary range is competitive, estimated from $100,000 to $130,000 annually.